NetBSD/sh5 |
About NetBSD/sh5
NetBSD/sh5 is the port of NetBSD to the SuperH SH-5 family of 32/64-bit CPUs. Currently status is "Experimental port". While it may be experimental, the port is stable in multi-user mode on the Cayman evaluation board, in both 32- and 64-bit modes.
TODO
dmesg Here's a dmesg(8) output: cayman{ttyp1}85: uname -a NetBSD cayman.nat.mctavish.co.uk 1.6I NetBSD 1.6I (CAYMAN64) #45: Sun Oct 20 12:15:21 BST 2002 steve@oor-wullie:/u0/netbsd/current/sys/arch/evbsh5/compile/CAYMAN64 evbsh5 cayman{ttyp1}86: dmesg [ using 220808 bytes of netbsd ELF symbol table ] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002 The NetBSD Foundation, Inc. All rights reserved. Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. NetBSD 1.6I (CAYMAN64) #45: Sun Oct 20 12:15:21 BST 2002 steve@oor-wullie:/u0/netbsd/current/sys/arch/evbsh5/compile/CAYMAN64 SuperH SH5 running at 256MHz total memory = 129728512 avail memory = 116248576 using 1609 buffers containing 6590464 bytes of memory mainbus0 (root) superhyway0 at mainbus0: SuperHyway bus pbridge0 at superhyway0 p-port 0x09: Peripheral Bridge, Version 0x0 intc0 at pbridge0 offset 0x1000000: Interrupt Controller cprc0 at pbridge0 offset 0x1010000: Clock, Power and Watchdog/Reset Controller clock0 at cprc0: PLL frequency - 512MHz clock0: External Memory Clock: 64MHz, SuperHyway Clock: 128MHz clock0: Peripheral Bus Clock: 21MHz, PCIbus Clock: 21MHz clock0: FEMI Bus Clock: 64MHz, ST Legacy Clock: 21MHz tmu0 at pbridge0 offset 0x1020000 ipl 14 intevt 0x400: Timer Unit tmu0: Tick period: 187 nS tmu0: Delay constant: 142 scif0 at pbridge0 offset 0x1030000 ipl 12 intevt 0x700 rtc0 at pbridge0 offset 0x1040000 Real-time Clock emi at superhyway0 not configured dmac at superhyway0 not configured femi0 at superhyway0 p-port 0x08: Flash/External Memory Interface, Version 0x0 femi0: Base Address: 0x0, Length: 0x8000000 sysfpga0 at femi0 offset 0x4000000: Cayman System FPGA, Revision: 5 - 02/05/24 (yy/mm/dd) sysfpga0: CPUCLKSEL: 400/200/100MHz, CPU Clock Mode: 3 superio0 at sysfpga0 offset 0x0: FDC37C935 Super IO Controller, Id 0x30, Revision 3 isa0 at superio0 com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo com0: console com1 at isa0 port 0x2f8-0x2ff irq 3: ns16550a, working fifo lpt0 at isa0 port 0x378-0x37b irq 7 sm0 at superio0 offset 0x1000 irq 10 sm0: SMC91C100FD, revision 0, buffer size: 128 KB sm0: MAC address 00:00:e1:6b:20:0a, default media MII sqphy0 at sm0 phy 0: Seeq 84220 10/100 media interface, rev. 0 sqphy0: using Seeq 84220 isolate/reset hack sqphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto sh5pci0 at superhyway0 p-port 0x40: SH-5 PCIbus Bridge, Version 0x0 sh5pci0: CSR at 0xffffffffe835c000 pci0 at sh5pci0 vendor 0x100b product 0x0022 (ethernet network) at pci0 dev 0 function 0 not configured ppb0 at pci0 dev 3 function 0: vendor 0x1011 product 0x0022 (rev. 0x06) pci1 at ppb0 bus 1 pci1: i/o space, memory space enabled, rd/line, wr/inv ok ppb1 at pci1 dev 0 function 0: vendor 0x1011 product 0x0022 (rev. 0x06) pci2 at ppb1 bus 2 pci2: i/o space, memory space enabled, rd/line, wr/inv ok eap0 at pci2 dev 0 function 0: vendor 0x1274 product 0x5880 CT5880C (rev. 0x02) eap0: interrupting at intevt 0x360 eap0: SigmaTel STAC9721/23 codec; 18 bit DAC, 18 bit ADC, SigmaTel 3D audio0 at eap0: full duplex, mmap, independent ahc0 at pci2 dev 1 function 0 ahc0: interrupting at intevt 0x360 ahc0: aic7850 Single Channel A, SCSI Id=7, 3/255 SCBs ahc0: Host Adapter Bios disabled. Using default SCSI device parameters scsibus0 at ahc0: 8 targets, 8 luns per target scsibus0: waiting 2 seconds for devices to settle... boot device: |
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